Conference information
 
Travelling
Tallinn is best reached from Helsinki and Stockholmby plane or ferry. There are also many other international flights from Amsterdam, Berlin, Copenhagen, Frankfurt am Main, London, Moscow, Riga, Vilnius and other airports.

Accommodation
Participants' accommodation costs for 2 nights in the Conference Centre of Laulasmaa Resort (www.laulasmaa.ee) will be covered by their conference fees.

Visa Information
To draw up a visa application in legal form please turn to websites:
http://www.mig.ee/eng/ ; http://www.mig.ee/vene/

Accepted Papers for BEC 2006

1.  Electronic Materials, Devices, and Simulation

Back

SESSION 1-1: Electronic Materials and Devices
Chair: Dr. Raido Kurel
 
D. Andriukaitis, R. Anilionis Local oxidation process simulation in nanoscale MOS/CMOS structures  
T. Kersys, D. Andriukaitis, R. Anilionis VMOS, UMOS structures simulation in micro and nano scale  
A. Baskys The model of the p-n junction depletion region v-i characteristic considering the dependence of concentration of majority carriers on voltage  
N. Kuznetsova, O. Korolkov, T. Rang and M. Pikkov The basic Schottky parameters for combined diffusion welded and sputter metal contacts  
SESSION 1-2: Electron-optical Devices and Electronic Systems
Chair: Prof. Enn Velmre
 
R. Reeder, A. Udal, E. Velmre, P. Harrison Numerical investigation of digitised parabolic quantum wells for terahertz AlGaAs/GaAs structures  
O. Korolkov, N. Kuznetsova and T. Rang Clamp mode package diffusion welded power SiC Schottky diodes  
Raido Kurel, Toomas Rang Static and dynamic behavior of the SiC complementary JBS structures  
J. Mizsei Contact free potential mapping by vibrating capacitor  
SESSION 1-3: Electron-optical Devices and Electronic Systems
Chair: Dr. Andres Udal
 
J. Flak, M. Laiho, K. Halonen On emerging nanodevices and architectures  
J. Skudutis, V. Daðkevièius Possibilities of applying the Microwave Office program package to the investigation of helical delay systems  
T. Burokas, V. Daskevicius, J. Skudutis, S. Staras Methods of simulation of the gutter-type helical system  
Poster Session  
D. Navikas, P. Tarvydas, A. Noreika Electric Field Potential Interpolation poster
P. Tarvydas, V. Markevièius, A. Noreika Electric Field Modeling Performance Analysis poster

2.  Integrated Electronics and Chip Design

SESSION 2-1: Digital Circuit Design
Chair: Prof. Vello Kukk
 
Peeter Ellervee, Eero Ivask, Margus Kruus Improved VHDL Input for High-Level Synthesis Tool xTractor  
Vineeth Govind, Jaan Raik, Raimund Ubar A Generic Synthesizable NoC Switch with a Scalable Testbench  
Xin Wang, Jari Nurmi A RTL Asynchronous FIFO Design Using Modified Micropipeline  
Lauri Ehrenpreis, Peeter Ellervee, Kalle Tammemäe Open Source On-Chip Logic Analyzer for FPGA-s  
SESSION 2-2: Analog Circuit Design
Chair: Dr. Eiko Kängsep
 
L. Aaltonen, M. Saukoski, I. Teikari and K. Halonen Noise analysis of comparator performed sine-to-square conversion  
J. Marjonen, R. Alaoja, H. Ronkainen, M. Åberg Low power successive approximation A/D converter for passive RFID tag sensors  
Tapio Rapinoja, Kari Stadius and Kari Halonen Behavioral Model based Simulation Methods for Charge-Pump PLL's  
Vello Mannama, Rein Sabolotny, Viktor Strik Ultra low noise low power LDO design  
SESSION 2-3: Optimization in Chip Design
Chair: Dr. Jaan Raik
 
Ilari Teikari, Kari Halonen Genetic algorithm based non-polynomial LUT update method for phase-amplitude RF predistortion  
S. Strik Bandgap voltage reference: errors and techniques for their minimization  
Poster Session  
P. Rahikkala, L. Aaltonen, K. Halonen A fully integrated Gm-C oscillator for readout of a force balanced accelerometer poster
E. Fomina and A. Zakrevski Graph Embedding in Boolean Hypercube poster

3.  Systems, Instrumentation and Communication

SESSION 3-1: Networking and Control
Chair: Dr. Raul Land
 
J. Treðtik, J. Fischer The Single Dimensional Edge Detection Method for the Intelligent Image sensor  
Rudolf Volner, Petr Boreð Multi-Biometric Techniques, Standards Activities and Experimenting  
SESSION 3-2: Fuzzy and Neuro Systems
Chair: Prof. Mart Min
 
G. Balodis, A. Sozontovs, B. Zuga, I. Slaidins Performance Estimation for MIMO Channel  
A. Baskys, V. Zlosnikas Controller for plants with the asymmetric dynamics  
Toomas Kirt, Aivo Anier Self-organization in Ad Hoc Wireless Networks  
A. Taklaja, S. Reisberg Broadcast in near-field region of transmitter antenna  
SESSION 3-3: Measurement
Chair: Dr. Toomas Parve
 
A. Pokatilov, T. Kübarsepp Establishment of National Standard of Voltage Unit in Estonia  
A. Pokatilov, T. Kübarsepp Development of Automated Measurement Setup for Standard Resistors  
Poster Session  
Vladimir Haasz, Milan Komarek, Jaroslav Roztoèil, Petr Suchanek Testing of Middle-resolution Digitisers at Input Signal Frequency of 1 MHz poster
Petr Suchanek, Milan Komarek, Vladimir Haasz Practical aspects of dynamic ADC testing in frequency range 1 to 20 MHz poster
T. Tõnnisson Portable FTIR spectrometer poster

4.   Test, Diagnostics, and Fault Tolerance

SESSION 4-1: Fault Simulation and Test Generation
Chair: Prof. Raimund Ubar
 
V. Hahanov, M. Kaminska and E. Fomina Testability Analysis of Digital Design Verification  
A. Jutman, A. Tsertov, R. Ubar A Tool for Advanced Learning of LFSR-Based Testing Principles  
E. Aleksejev, A. Jutman, R. Ubar LFSR Polynomial and Seed Selection Using Genetic Algorithm  
Yu.B. Burkatovskaya, N.B. Butorina, A. Yu. Matrosova Self-Testing Checker Design for arbitrary number of code words of (m,n) code  
SESSION 4-2: BIST and System Testing
Chair: Prof. Margus Kruus
 
Maria Fischerova, Tomað Pikula, Martin Ðimlaðtik, Alberto Bosio, Stefano di Carlo, Giorgio di Natale A tool for teaching memory testing based on BIST  
K. Hermann, J. Raik, M. Jenihhin TTBist: a DfT Tool for Enhancing Functional Test for SoC  
Skobtsov Y.A., El-Khatib A.I., Ivanov D.E. Distributed Genetic Algorithm of Test Generation For Digital Circuits  
R. Ubar, G. Jervan, H. Kruus, E. Orasson, I. Aleksejev Optimization of the Store-and-Generate Based Built-in Self-Test  
Poster Session  
A. Mellik Automated XML-based Test Modelling For Mixed-Signal Circuits poster
R. Ubar, M. Brik, A. Jutman, J. Raik, T. Bengtsson, S. Kumar Functional Test Generation for Finite State Machines poster

5.  Biomedical Electronics

SESSION 5-1: Biomedical Electronics
Chair: Prof. Kalju Meigas
 
Toivo Paavle Modeling in the Bioimpedance Measurement Techniques Using General-Purpose Software  
Rauno Gordon Simulation of Intra-Cardiac Complex Impedance Signals for Developing Simple Bio-impedance Models for Cardio-Dynamics  
O. Märtens, M. Min Multifrequency Vector Impedance Measurement: Undersampled DFT with Noise Pre-filtering  
A. Usinskas, R. Gleizniene Ischemic stroke region recognition based on ray tracing  
Poster Session
A. Krivoshei A Bio-Impedance Signal Synthesiser (BISS) for Testing of an Adaptive Filtering System poster

6.  Power Electronics

SESSION 6-1: Power Electronics
Chair: Prof. Tõnu Lehtla
 
T. Sakkos, V. Sarv A new high power factor single-phase diode rectifier with optimum ripple-power conversion  
A. Sokolovs, I. Galkin, J. Laugis Bus bar test bench development for common 3x3 matrix converter  
I. Galkin, A. Stepanov, J. Laugis Outlook of usage of supercapacitors in uninterruptible power supplies  
D. Vinnikov Isolated DC/DC Converter Topology with a Three-Phase Intermediate AC-Link  
Poster Session  
M. Pikkov, T. Rang, A. Pokatilov SiC Schottky Diode for Use in Power Convertors poster
 

Plenary Session - Invited Papers

Chair: Prof. Toomas Rang

Back

P. Harrison, Z. Ikoniã, N. Vukmiroviã, D. Indjin, R.W. Kelsall and V.D. Jovanoviã, University of Leeds, U.K. On the incoherence of quantum transport in semiconductor heterostructure optoelectronic devices - Abstract
Mrinal K. Das, Cree, Inc., USA Development of a Commercially Viable 4H-SiC PiN Diode Technology - Abstract
Marta Rencz, Budapest University of Technology and Economics, Hungary Thermal qualification of 3D stacked die structures - Abstract
Leandro Soares Indrusiak, Manfred Glesner, Technische Universität Darmstadt, Germany SoC Specification using UML and Actor-Oriented Modeling - Abstract
Axel Jantsch, Royal Institute of Technology, Sweden Compositional Traffic in Networks on Chip - Abstract
 

BEC 2006 Timetable

 

Back

Registration: Monday 2 Oct. 9:00-14:00 Tallinn University of Technology
Tuesday 3 Oct. 8:00-18:00 Conference Centre of Laulasmaa Resort
Wednesday 4 Oct. 9:00-10:00 Conference Centre of Laulasmaa Resort
Monday 2 Oct.
  Room: Tallinn University of Technology (TUT), Building 7, Room VII 226
11:00 Plenary Session Chair: Prof. Toomas Rang
  Opening address, Greetings Prof. T. Rang
Rector Prof. P. Sürje
11:30 Invited talk 1 On the incoherence of quantum transport in semiconductor heterostructure optoelectronic devices, Paul Harrison, University of Leeds, U.K.
12:00 Invited talk 2 Development of a Commercially Viable 4H-SiC PiN Diode Technology, Mrinal K. Das, Cree, Inc., USA
12:30 Invited talk 3 Thermal qualification of 3D stacked die structures, Marta Rencz, Budapest University of Technology and Economics, Hungary
13:00 Invited talk 4 SoC Specification using UML and Actor-Oriented Modeling, Leandro Soares Indrusiak, Darmstadt University of Technology, Germany
13:30 Invited talk 5 Compositional Traffic in Networks on Chip, Axel Jantsch, Royal Institute of Technology, Sweden
14:00 Info, Prof. T. Rang
14:30 Bus departure from TUT Campus to the Conference Centre of Laulasmaa Resort.
18:00 Conference Wellcome Reception.
Tuesday 3 Oct.
  Room A Room B Room C
9:30-10:50 1. Electronic Materials, Devices, and Simulation
SESSION 1-1: Electronic Materials and Devices
Chair: Dr. Raido Kurel
2. Integrated Electronics and Chip Design
SESSION 2-1: Digital Circuit Design
Chair: Prof. Vello Kukk
6.  Power Electronics
SESSION 6-1: Power Electronics
Chair: Prof. Tõnu Lehtla
10:50-11:20 Coffee
11:20-12:40 1. Electronic Materials, Devices, and Simulation
SESSION 1-2: Electron-optical Devices and Electronic Systems
Chair: Prof. Enn Velmre
2. Integrated Electronics and Chip Design
SESSION 2-2: Analog Circuit Design
Chair: Dr. Eiko Kängsep
4. Test, Diagnostics, and Fault Tolerance
SESSION 4-1: Fault Simulation and Test Generation
Chair: Prof. Raimund Ubar
13:00-15:00 Lunch
15:00-16:00 Poster session
Chair: M.Sc. Natalja Kuznetsova
16:00-16:30 Coffee
16:30-17:50 1. Electronic Materials, Devices, and Simulation
SESSION 1-3: Electron-optical Devices and Electronic Systems
Chair: Dr. Andres Udal
Student session
Chair: Prof. Peeter Ellervee
3. Systems, Instrumentation and Communication
SESSION 3-1: Networking and Control
Chair: Dr. Raul Land
19:00 Conference Dinner
Wednesday 4 Oct.
  Room A Room B Room C
9:30-10:50 5.  Biomedical Electronics
SESSION 5-1: Biomedical Electronics
Chair: Prof. Kalju Meigas
4. Test, Diagnostics, and Fault Tolerance
SESSION 4-2: BIST and System Testing
Chair: Prof. Margus Kruus
3. Systems, Instrumentation and Communication
SESSION 3-2: Fuzzy and Neuro Systems
Chair: Prof. Mart Min
10:50-11:20 Coffee
11:20-12:00   2. Integrated Electronics and Chip Design
SESSION 2-3: Optimization in Chip Design
Chair: Dr. Jaan Raik
3. Systems, Instrumentation and Communication
SESSION 3-3: Measurement
Chair: Dr. Toomas Parve
12:30 Conference closing
Rooms A, B, C » Conference Centre of Laulasmaa Resort

c Programme

Note!
All participants (students, guests, accompaning persons as well) have to fulfil the Registration and Paper Submission Form following the instructions stated in the Form.

 

STransfer to Laulasmaa (public transport)

Small Bus no 237A

Back

Back

 

Department of Electronics, TUT, bec@elin.ttu.ee