Institute of Applied Mathematics and Mechanics of Ukrainian Academy of Sciences.
The test generation and logical simulation are important parts of digital devices (DD) CAD. They allow to improve quality and productivity of DD design, control and diagnosis. The test generation problem is one of the most difficult in DD CAD.
We propose structural automatic test pattern generation (ATPG) method for sinchronous sequential DD. It takes into account stuck-at faults. Iterative combinational circuit is used as model of considered sequential DD.
We use the set of multivalued functions and universal 16-valued alphabet like basic mathematical model of proposed method.
The algorithm is based at the propagation of critical values D(D') through improved procedures of structural and logical local implication and application of multiple observation time strategy.
Improved logical local implication is based at the employment of multivalued functions. Multiple observation time strategy is as follows. During test generation process we take into account the output responses of given device at the all time frames. That is the output values of each iteration of iterative combinational model are taken into account. The main advantages of multiple observation time strategy are: